Job Description
Responsibilities:The successful candidate will own technical program management for our Oryon CPU Engineering team's development and delivery to a key Qualcomm SoC. This is the same team behind Snapdragon Elite X laptop SoC!! (Industry leading windows laptop SoC) Responsibilities will include:Coordinate, plan and drive CPU IP development, testing and delivery to SoC alongside the smartest minds in the industry!Negotiate schedule, scope and line up resources to meet aggressive schedules to deliver best in class efficient, high-performance CPUs.Organize and lead interdepartmental discussions to set project milestones/schedules, plans of records, define project tasks, establish program policies and processes.Responsible for managing IP-SoC relationship.Troubleshoot program issues and help to develop alternative program tasks, schedules, milestones, resource plans, processes etc. to resolve program issues and conflicts.Determine risks, develop mitigation strategies, and communicate information to internal and external key stakeholders. Must be able to proactively drive and solve problems to solutions.Roll-up and report regularly to senior management-executives on key development milestones, budget, metrics, risks, and mitigation plans.Develop processes to increase the productivity and efficiency of the team.Manage teams through design, development, validation, test, manufacturing, deployment, and sustaining activities for hardware products.Be an advocate for the program in cross-functional and stakeholder meetings.
Responsibilities + Skills
Education
Bachelor's degree in Engineering, Computer Science, or related field.4+ years of Program Management or related work experience.
Experience
Experience as an engineer in chip development and integration into hardware or software systems. Experience with silicon development methodologies, leading tape-outs and silicon validation.A successful candidate requires a strong IP core (preferably CPU) design & debug background including Project Management of IP team working on multiple programs.Technical domain expertise in all aspects of VLSI development cycle and IP delivery process.You will help coordinate and support methodology deployment and play a key role in planning future IP validation and development initiatives.